| Q:
Do I have to program the FPGA
after power-on? |
| A:
Yes, the Xilinx FPGA is volatile and needs to be programmed
after power-on. |
| Q:
Is there an FPGA configuration EEPROM on the board? |
| A:
No, there is no configuration EEPROM on the board. |
| Q:
Can the FPGA be programmed via USB? |
| A:
Yes, the FPGA can be programmed via USB. It can also be
programmed via JTAG port using the Xilinx programming tools
(sold separately by Xilinx). |
| Q:
What programming mode is used to program the FPGA? |
| A:
Xilinx Slave Serial Programming mode is used to program the
FPGA. |
| Q:
How long does it take to program the FPGA via USB? |
| A:
The programming time depends on the density of the FPGA so
it may vary. In most cases it takes less than a second to
program. |
| Q:
Can board power be supplied from the USB bus? |
| A:
Yes, the board can be powered from the USB bus (bus powered
mode) or it can be powered from an external power supply
(self powered mode). |
| Q:
What is the maximum frequency I can supply to the FPGA? |
| A:
According to Xilinx Spartan-II datasheet, the FPGA should be
able to run up-to 200MHz. The actual frequency depends on
the complexity of your design. |
| Q:
Are the Xilinx Spartan-II FPGA IO pins 5-V tolerant? |
| A:
Yes, the signaling is LVTTL which is compliant with 5-V
signaling. |
| Q:
What is the FPGA USB interface? |
| A:
Simple asynchronous FIFO interface. All USB functions are
handled external to the FPGA. FPGA code has no awareness of
USB complexity. Once data arrives from host, FIFO empty flag
goes false and data can be read out as if it were any other
FIFO. Writes are handled similarly. |